Clear event enable register
| WAKEUP0_CLREN | Writing a 1 to this bit clears the event enable bit 0 in the ENABLE register. |
| WAKEUP1_CLREN | Writing a 1 to this bit clears the event enable bit 1 in the ENABLE register. |
| WAKEUP2_CLREN | Writing a 1 to this bit clears the event enable bit 2 in the ENABLE register. |
| WAKEUP3_CLREN | Writing a 1 to this bit clears the event enable bit 3 in the ENABLE register. |
| ATIMER_CLREN | Writing a 1 to this bit clears the event enable bit 4 in the ENABLE register. |
| RTC_CLREN | Writing a 1 to this bit clears the event enable bit 5 in the ENABLE register. |
| BOD_CLREN | Writing a 1 to this bit clears the event enable bit 6 in the ENABLE register. |
| WWDT_CLREN | Writing a 1 to this bit clears the event enable bit 7 in the ENABLE register. |
| ETH_CLREN | Writing a 1 to this bit clears the event enable bit 8 in the ENABLE register. |
| USB0_CLREN | Writing a 1 to this bit clears the event enable bit 9 in the ENABLE register. |
| USB1_CLREN | Writing a 1 to this bit clears the event enable bit 10 in the ENABLE register. |
| SDMMC_CLREN | Writing a 1 to this bit clears the event enable bit 11 in the ENABLE register. |
| CAN_CLREN | Writing a 1 to this bit clears the event enable bit 12 in the ENABLE register. |
| TIM2_CLREN | Writing a 1 to this bit clears the event enable bit 13 in the ENABLE register. |
| TIM6_CLREN | Writing a 1 to this bit clears the event enable bit 14 in the ENABLE register. |
| QEI_CLREN | Writing a 1 to this bit clears the event enable bit 15 in the ENABLE register. |
| TIM14_CLREN | Writing a 1 to this bit clears the event enable bit 16 in the ENABLE register. |
| RESERVED | Reserved. |
| RESET_CLREN | Writing a 1 to this bit clears the event enable bit 19 in the ENABLE register. |
| BODRESET_CLREN | Writing a 1 to this bit clears the event enable bit 20 in the ENABLE register. |
| DPDRESET_CLREN | Writing a 1 to this bit clears the event enable bit 21 in the ENABLE register. |
| RESERVED | Reserved. |